A Cross-layered Pilot Scheme for IEEE 802.11p

Vehicular communication is expected to be a part of the future transportation system and promises to support a plethora of applications for traffic safety, traffic efficiency, and fuel efficiency. Traffic safety applications, such as collision avoidance, demand reliable communications with low latency. To support reliable communications in terms of low frame error rates (FERs), it is necessary to accurately estimate the wireless channel in a receiver. Vehicular wireless channels being highly timeand frequency-variant require the communication systems to accurately estimate the channels for the entire duration of the frames. IEEE 802.11p has been specified as the physical and medium access layers standard for vehicular communications. The pilots in an 802.11p frame are densely concentrated at the beginning of the frame, and as a consequence, accurate channel estimation at later parts of the frame becomes a challenging task. To attain low FERs with the existing pilot pattern, receivers with iterative decoding and equalization strategies have been studied in the literature. These receivers are computationally complex and introduce additional latency in decoding the frames. In this thesis, an alternative solution to overcome the ill-suited pilot pattern is studied. In Paper A, a cross-layered pilot scheme to insert complementary pilots into the 802.11p frame is proposed. The pilot insertion is performed above the physical and medium access layers and therefore does not require modifications to the 802.11p standard. A modified receiver can utilize the complementary pilots for improved channel estimation, while a standard receiver treats the inserted pilots as data and passes them to the higher layers, where they can be removed. A modified receiver that utilizes the complementary training symbols for channel estimation with linear minimum mean squared-error interpolator is described. Numerical results show that FER close to the case with perfect channel state information (CSI) can be obtained with the described receiver for suitably chosen period of pilot insertion. In Paper B, the pilot insertion scheme proposed in Paper A is further improved to support short frames. Hardware implementation feasibility of the proposed scheme is shown by implementing a modified receiver that can utilize the complementary pilots in an field programmable gate array (FPGA) platform. Two low complexity channel estimation schemes are implemented in the modified receiver. Backward compatibility of the proposed scheme is also verified by conducting tests with a commercial transceiver. FER measurements are performed by interfacing the implementation with a channel emulator. The results show that the modified receiver follows the performance of a receiver with perfect CSI with an offset of 3.5 to 4 dB in signal-to-noise ratio and significantly outperforms the commercial 802.11p transceiver we tested.